Analog Layout

Job Overview

CirisSemi is seeking an experienced Analog Layout engineers to join our growing team.

Requirements:

  • ⭐ Excellent work experience in Analog Layout design in advanced node processes.
  • ⭐ Hands on experience in BGR, LDO, Charge pump, DCDC, PLL, ADC, DAC, Current Mirrors, Comparator, Differential Amplifier etc.
  • ⭐ Excellent understanding of CMOS / Bi-CMOS / SOI / FinFET process.
  • ⭐ Excellent understanding of Analog Layout concepts including Matching, EM, Latch-up, Coupling, Cross-talk, IR-drop.
  • ⭐ Excellent problem-solving skills in Routing Congestion, ERC, Physical Verification in Custom Layout.

Skill Sets Preferred / required:

  • ✔ 3-5 Years of relevant experience.
  • ✔ DRC / LVS / ERC / Antenna / LPE / DFM checks.
  • ✔ Knowledge of analog layout techniques and circuit principles.
  • ✔ Hands-on experience with Cadence & Calibre EDA tools on Linux.
  • ✔ Strong communication skills and team collaboration.
  • ✔ Ability to function independently, be self-driven.

Drop your CV at: contact@cirissemi.com

Power Management IC Design (PMIC)

CirisSemi is an Semiconductor IP development organization serving Automotive, Consumer, Communication and IoT applications.

Job Overview

The Analog Design Engineer will lead Power Management IC products design with DC-DC converters (Buck/Boost).

Requirements:

  • ⭐ Development of Power Management Products – Buck, Boost and LDO.
  • ⭐ Knowledge of Power converter architectures.
  • ⭐ Architecture and control loop analysis.
  • ⭐ OpAmp, Comparator, Bandgap, Oscillator design.
  • ⭐ IC floor plan, integration and layout supervision.

Skill Sets Preferred / required:

  • ✔ Masters / PhD in Electronics / VLSI.
  • ✔ Understanding of high-voltage and high-power reliability.
  • ✔ 3-7 years of experience.
  • ✔ Strong communication and teamwork skills.
  • ✔ Ability to work independently.

Drop your CV at: contact@cirissemi.com

Data Converters (ADC/DAC) and PLL

Job Overview

Senior Analog/Mixed-Signal Design Engineer focusing on ADC, DAC and PLL design and layout supervision.

Requirements:

  • ⭐ High-performance analog or mixed-signal IC development in advanced CMOS.
  • ⭐ ADC/DAC, Bandgap, OpAmp, Comparator, DLL and PLL design.

Skill Sets Preferred / required:

  • ✔ Strong transistor-level circuit understanding.
  • ✔ Analog and digital behavioral modeling.
  • ✔ 3-7 years of experience.
  • ✔ Familiar with Cadence simulation tools.
  • ✔ MATLAB knowledge is an advantage.
  • ✔ Strong communication skills.
  • ✔ Ability to function independently.

Drop your CV at: contact@cirissemi.com